Along with trend of integrated circuit devices toward high-density integration, required accuracy of manufacturing process becomes higher and higher. Because of smaller distances between components, isolation between components becomes more important. The shallow trench isolation (STI) technology has been developed to fulfill this isolation requirement of components. Methods for filling the trench include chemical vapor deposition (CVD) and plasma-enhanced chemical vapor deposition (PECVD). An oxide layer is formed directly on the trench, and then a planarization process such as resist etch back (REB), reactive ion etch (RIE), or chemical mechanical polishing (CMP) is used to acquire a more planar chip surface. Although the above mentioned methods for filling the trench can successfully fill the trench, voids may easily arise from incomplete filling. To overcome this problem, high-density plasma chemical vapor deposition (HDP-CVD) method has been developed to generate high-density plasma oxide layer for filling the trench. The HDP-CVD method has advantages such as that gap does not easily arise, and that the oxide layer has low wet chemical etch rate, better moisture-resistance, and better stability.
In prior art, there exist many planarization processes of the shallow trench isolation. The most efficient one is that using reverse mask and pre-etch at active regions to let chemical mechanical polishing be better controlled. For instance, U.S. Pat. No. 5,851,899 discloses a gapfill and planarization process for shallow trench isolation. However, photolithography is needed in this process, resulting in higher cost.
To reduce cost, photolithography must be avoided. Another technology using poly-silicon cap and chemical mechanical polishing to form a self-align reverse mask is thus proposed. This technology can be successfully applied to process of using tetra-ethyl-ortho-silicate (TEOS) to fill the shallow trench, but can not be applied to process of using high-density plasma to fill shallow trench isolation. This is because that when the poly-silicon cap is polished using chemical mechanical polishing, dishing effect arises so as to let high-density plasma oxide layer be exposed out of the self-align reverse mask.